| 學士:國立台灣大學電機工程學系 碩士:國立台灣大學電子工程學研究所 博士:國立台灣大學電子工程學研究所 |
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| IC領域: 電子設計自動化 奈米積體電路實體設計 製造可行性/可靠性設計 |
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. 課程 超大型積體電路設計導論 奈米積體電路實體設計 主要著作 【期刊論文】 [1] S.-Y. Fang, W.-Y. Chen, and Y.-W. Chang, “Graph-Based Subfield Scheduling for Electron-Beam Photomask Fabrication,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 32, no. 2, pp.189-201, February 2013. [2] S.-Y. Fang, S.-Y. Chen, and Y.-W. Chang, “Native-Conflict and Stitch-Aware Wire Perturbation for Double Patterning Technology,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 31, no. 5, pp. 703-716, May 2012. 【研討會論文】 [1] S.-Y. Fang, I.-J. Liu, and Y.-W. Chang, “Stitch-Aware Routing for Multiple E-Beam Lithography,” in Proceedings of ACM/IEEE Design Automation Conference (DAC-2013), Austin, TX, June 2013. [2] S.-Y. Fang, C.-W. Lin, G.-W. Liao, and Y.-W. Chang, “Simultaneous OPC- and CMP-aware Routing Based on Accurate Closed-Form Modeling,” in Proceedings of ACM International Symposium on Physical Design (ISPD-2013), pp.77-84, The Ridge Tahoe, NV, March 2013. (Best Paper Nominee) [3] S.-Y. Fang, C.-W. Lin, G.-W. Liao, and Y.-W. Chang, “Accurate Closed-Form Modeling for Simultaneous OPC- and CMP-Aware Routing,” in the 23th VLSI Design/CAD Symposium, Pingtong, August 2012. [4] S.-Y. Fang and Y.-W. Chang, “Simultaneous Flare Level and Flare Variation Minimization with Dummification in EUVL,” in Proceedings of ACM/IEEE Design Automation Conference (DAC-2012), pp. 1175-1180, San Francisco, CA, June 2012. [5] S.-Y. Fang, Y.-W. Chang, and W.-Y. Chen, “A Novel Layout Decomposition Algorithm for Triple Patterning Lithography,” in Proceedings of ACM/IEEE Design Automation Conference (DAC-2012), pp. 1181-1186, San Francisco, CA, June 2012. [6] S.-Y. Fang, T.-F. Chien, and Y.-W. Chang, “ECO Timing and Mask Cost Optimization with Redundant Wires,” in the 21th VLSI Design/CAD Symposium, Kaohsiung, August 2010. (Best Paper Award) [7] S.-Y. Fang, W.-Y. Chen, and Y.-W. Chang, “Graph-Based Subfield Scheduling for Electron-Beam Photomask Fabrication,” in Proceedings of ACM International Symposium on Physical Design (ISPD-2012), pp.9-16, Napa, CA, March 2012. (Best Paper Nominee) [8] S.-Y. Fang, W.-Y. Chen, and Y.-W. Chang, “Subfield Scheduling with Blocked Region Consideration for Electron-Beam Photomask Fabrication,” in the 22th VLSI Design/CAD Symposium, Chiayi, August 2011. [9] S.-Y. Fang, T.-F. Chien, and Y.-W. Chang, “Redundant-Wires-Aware ECO Timing and Mask Cost Optimization,” in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD-2010), pp. 381-386, San Jose, November 2010. |
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