.

教授課程

數位電子學、數位系統電路後段設計流程整合、次微米超大型積體電路設計、次微米積體電路設計實習、超大型積體電路設計、硬體描述語言

國科會計畫

2008整係數數位濾波器之合成：由系統規格至實現之計自動化(II)

2007整係數數位濾波器之合成：由系統規格至實現之計自動化(I)

2006高階振幅相位調變 (QAM) 使用之 FIR 濾波器設計

2005依動態規劃開發之定點式乘法係數之快速設計法

2004對稱、反對稱、與非對稱定點式有限脈衝響應濾波器之高階合成程序

2003於通訊基頻訊號處理中帶正負號二冪次係數FIR濾波器之VHDL程式產生器研發

2002 2.4GHz數位式立體聲無線喇叭與耳機研發

2001帶正負號二冪次係數線性相位FIR濾波器之VHDL程式產生器研發

1996適用於無線通訊網路之適應型天線陣列演算法研發與實作

1994利用新的遙控弦波擾動衰減法之聲頻雜訊有弗惆?/td>

1993使用 perceptron 設計之全數位頻率合成器之積體電路研發

期刊論文

[1] Chia-Yu Yao, “A design method of hybrid analog/asymmetrical-FIR pulse-shaping filters,” accepted by ETRI Journal, Dec. 2010. (SCI, EI) (NSC 98-2221-E-011-085)

[2] Chia-Yu Yao and Chih-Chun Hsieh, “Hardware simplification to the delta path in a MASH 111 delta-sigma modulator,” IEEE Trans. Circuits Syst. II, vol. 56, no. 4, pp. 270-274, April 2009. (NSC 97-2221-E-011-139) (SCI, EI)

[3] Chia-Yu Yao and Chin-Chih Yeh, “An application of the second-order passive lead-lag loop filter for analog PLLs to the third-order charge-pump PLLs,” IEEE Trans. Ind. Electron., vol. 55, no. 2, pp. 972-974, Feb. 2008. (SCI, EI) (NSC 95-2221-E-011-214)

[4] Chia-Yu Yao, “The design of square-root-raised-cosine FIR filters by an iterative technique,” IEICE Trans. on Fundamentals, vol. E90-A, no. 1, pp. 241-248, Jan. 2007. (SCI, EI)(NSC 94-2215-E-011-007)

[5] Chia-Yu Yao, Jen-Wei Tsai, and Jou-Hung Wang, “A novel VCO structure with five interlocked ring oscillators,” J. of the Chinese Institute of Electrical Engineering, vol. 9, no. 4, pp. 401-406, Nov. 2002. (EI)

[6] Chiang-Ju Chien and Chia-Yu Yao, “An output based adaptive iterative learning controller for high relative degree uncertain linear systems,” Automatica, vol. 40, no. 1, pp. 145-153, 2004. (SCI, EI) (NSC 90-2213-E-211-002)

[7] Chiang-Ju Chien and Chia-Yu Yao, “Iterative learning of model reference adaptive controller for uncertain nonlinear systems with only output measurement,” Automatica, vol. 40, no. 4, pp. 855-864, 2004. (SCI, EI) (NSC 90-2213-E-211-002)

[8] Chiang-Ju Chien, Chun-Te Hsu, and Chia-Yu Yao, “Fuzzy system based adaptive iterative learning control for nonlinear plants with initial state errors,” IEEE Transactions on Fuzzy Systems, vol. 12, no. 5, pp. 724-732, 2004. (SCI, EI)

[9] Chia-Yu Yao, Hsin-Horng Chen, Tsuan-Fan Lin, Chiang-Ju Chien, and Chun-Te Hsu, “A novel common-subexpression-elimination method for synthesizing fixed-point FIR filters,” IEEE Trans. Circuits Syst. I., vol. 51, no. 11, pp. 2215-2221, Nov. 2004. (SCI, EI) (NSC 92-2218-E-211-002)

[10] Chia-Yu Yao, Hsin-Horng Chen, Chiang-Ju Chien, and Chun-Te Hsu, “A high-level synthesis procedure for linear-phase fixed-point FIR filters with SPT coefficients,” Int. J. of Electrical Engineering, vol. 12, no. 1, pp. 75-84, Feb. 2005. (SCIE, EI) (NSC 92-2218-E-211-002)

[11] Chia-Yu Yao, Chun-Te Hsu, and Chiang-Ju Chien, “Stability Analysis of Fourth-Order Charge-Pump PLLs using Linearized Discrete-Time Models,” IEICE Trans. Electronics., vol. E90-C, no. 3, pp.628-633, March 2007. (SCI, EI) (NSC94-2215-E-011-007)

[12] Chia-Yu Yao and Chiang-Ju Chien, “A partial MILP algorithm for the design of linear phase FIR filters with SPT coefficients,” IEICE Trans. Fundamentals, vol. E85-A, no. 10, pp. 2302-2310, Oct. 2002. (SCI, EI)

[13] Chia-Yu Yao and Jen-Wei Tsai, “Programmable divide-by-N counter with 50% duty cycle output,” Electronics Letters, vol. 35, no. 8, pp. 624-625, April 1999. (SCI, EI)

研討會論文

[1] Chia-Yu Yao and Chung-Lin Sha, “Fixed-point FIR filter design and implementation in the expanding subexpression space,” in Proc. 2010 IEEE Int. Symp. Circuits and Systems, Paris, France, May 2010, pp. 185-188. (NSC 97-2221-E-011-139).

[2] Chia-Yu Yao and Chung-Lin Sha, “Fixed-point FIR Filter Design and Implementation in the Expanded Subexpression Space,” in Proc. 2009 VLSI Design/CAD Symp., Hua-Lien, Aug. 2009.

[3] Chia-Yu Yao and Chih-Chun Hsieh, “Hardware simplification to the delta path in a MASH 111 delta-sigma modulator,” in Proc. National Symposium on Telecommunications, 2008, Yunlin, Dec. 2008.

[4] Chia-Yu Yao and Alan N. Willson, Jr., “The Design of Asymmetrical Square-Root Pulse-Shaping Filters with Wide Eye-Openings”, in Proc. 2008 IEEE Int. Symp. Circuits and Systems, Seattle, USA, May 2008, pp. 2665-2668.

[5] Chia-Yu Yao, “A Design Method of FIR Filters for QAM Applications,” in Proc. National Symposium on Telecommunications, 2007, Taipei, Nov. 2007, pp. 1099-1103.

[6] Chia-Yu Yao, Chun-Te Hsu, and Chih-Chun Hsieh, “Stability Analysis of Fourth-Order Charge-Pump PLLs using Linearized Discrete-Time Models,” in Proc. IEEE TENCON 2007, Taipei, Oct. 2007. (NSC 94-2215-E-011-007)

[7] Chia-Yu Yao, Chun-Te Hsu, and Chih-Chun Hsieh, “Stability Analysis of Fourth-Order Charge-Pump PLLs using Linearized Discrete-Time Models,” in Proc. 2007 VLSI Design/CAD Symp., Hua-Lien, Aug. 2007, pp. 5-8.

[8] Chia-Yu Yao and Alan N. Willson, Jr., “The design of symmetric square-root pulse-shaping filters for transmitters and receivers,” in Proc. 2007 IEEE Int. Symp. Circuits and Systems, New Orleans, USA, May 2007, pp.2056-2059. (EI) (NSC 95-2221-E-011-214)

[9] Chia-Yu Yao, Chun-Te Hsu, and Chin-Chih Yeh, “The analysis of phase-jitter variance in the third-order CPPLL frequency synthesizer,” in Proc. IEEE 2006 Asia-Pacific Conf. Circuits Systems, Singapore, Dec. 2006, pp. 1045-1048. (EI) (NSC 94-2215-E-011-007)

[10] 姚嘉瑜、王明傑、褚芳達, “高精確度低成本計時卡之研發,” 2006時頻技術與業務推廣研討會, 中華電信研究所, 2006年8月31日, pp. 46-51.

[11] Chia-Yu Yao, Chun-Te Hsu, and Chin-Chih Yeh, “The Derivation of Phase-Jitter Variance for the Third-Order Charge-Pump PLL Frequency Synthesizer,” in Proc. 2006 VLSI Design/CAD Symp., Hua-Lien, Aug. 2006, pp. 209-212.

[12] Chia-Yu Yao, Chin-Chih Yeh, and Chun-Te Hsu, “The analysis of phase-jitter variance for the second-order CPPLL frequency synthesizer,” in Proc. ICCCAS2006, GuiLin, China., June 2006, pp. 2503-2506. (NSC 94-2215-E-011-007)

[13] Chia-Yu Yao and Chiang-Ju Chien, “The design of a square-root-raised-cosine FIR filter by a recursive method,” in Proc. 2005 IEEE Int. Symp. Circuits and Systems, Kobe, Japan, May 2005, pp.512-515. (NSC 93-2215-E-211-004)

[14] Chia-Yu Yao, Hsin-Horng Chen, Tsuan-Fan Lin, Chiang-Ju Chien, and Chun-Te Hsu, “A new common-subexpression-sharing method for the synthesis of FIR filters,” in Proc. IEEE 2004 Asia- Pacific Conf. Circuits Systems, Tainan, Taiwan, R.O.C., Dec. 2004, pp. 701-704. (NSC 92-2218-E-211-002)

[15] Chun-Te Hsu, Chiang-Ju Chien, Hsin-Hui Chiang, and Chia-Yu Yao, “FPGA implementation of a fuzzy logic controller using VHDL,” 2004 National Conference on Fuzzy Theory and Its Applications, Taiwan, R.O.C., Nov., 2004.

[16] Chun-Te Hsu, Chiang-Ju Chien, Hsin-Hui Chiang, Chia-Yu Yao, and Tz-Ming Wu, “The FPGA Realization of an Iterative Learning Control Algorithm,” 2004 R.O.C. Automatic Control Conference, Taiwan, R.O.C., Mar. 2004.

[17] Chun-Te Hsu, Chiang-Ju Chien, and Chia-Yu Yao, and Yen-Ko Chiang, “The design and application of a self-organized fuzzy system,” 2003 The Joint Conference on AI, Fuzzy System and Grey System, Taipei, Taiwan, R.O.C., December, 2003.

[18] Chia-Yu Yao and Calvin Chen, “Development of 2.4 GHz Stereo Digital Wireless Speakers and Headphones,” Proc. 2003 Workshop on Consumer Electronics, Tainan, Nov. 2003. (NSC91-2622- E-211-004-CC3).

[19] Chun-Te Hsu, Chiang-Ju Chien, and Chia-Yu Yao, “A New Algorithm of Adaptive Iterative Learning Control for Uncertain Robotic Systems,” Proc. 2003 IEEE International Conference on Robotics and Automation, pp. 4130-4135, Taipei, Taiwan, Sep. 2003. (EI) (NSC 90-2213-E-211- 002)

[20] Chia-Yu Yao, Hsin-Horng Chen, and Chiang-Ju Chien, “A high-level synthesis procedure for fixed-point high-speed FIR filters with signed-powers-of-two Coefficients,” Proc. 14th VLSI Design CAD Symposium, Hua-Lein, Aug. 2003, pp.313-316.

[21] Chia-Yu Yao, Chin-Chih Yeh, Tsuan-Fan Lin, Hsin-Horng Chen, and Chiang-Ju Chien, “A design flow for linear-phase fixed-point FIR filters: from the NPRM specifications to a VHDL code,” in Proc. 2003 IEEE Int. Symp. Circuits and Systems, vol. IV, Bangkok, Thailand, May 2003, pp.277-280. (EI)(NSC90-2215-E-211-001)

[22] Chun-Te Hsu, Chiang-Ju Chien, and Chia-Yu Yao, “A New Algorithm of Adaptive Iterative Learning Control for Uncertain Robotic Systems,” 2003 R.O.C. Automatic Control Conference, pp. 829-834, Taiwan, R.O.C., Mar. 2003.

[23] Chiang-Ju Chien, Chun-Te Hsu and Ch-a-Yu Yao, “Fuzzy system based adaptive iterative learning controller for nonlinear plants with initial state errors,” 2002 R.O.C. Automatic Control Conference, pp. 316–321, Taiwan, R.O.C., Mar. 2002.

[24] Tsuan-Fan Lin, Hsin-Horng Chen, and Chia-Yu Yao, “Design and analysis of the VHDL program generator for linear-phase FIR filters,” Proc. 2002 Nat’l Symp. on Telecommunications, PDSP1-4, Nan-Toe, Taiwan, Dec. 2002.

[25] Chia-Yu Yao, Jou-Hung Wang, and Chiang-Ju Chien, “A design recipe of charge-pump PLL frequency synthesizer,” Proc. IEEE Int’l Symp. on Intelligent Signal Processing and Communication Systems, Kaohsiung, Taiwan, ROC, Nov. 2002, pp. 478–482. (EI)

[26] Chia-Yu Yao, Jen-Wei Tsai, and Jou-Hung Wang, “A Novel Design of VCO with Interlocking Ring Oscillators,” Proc. Int’l Symp. on Communications, Tainan, Nov. 2001.

[27] Chia-Yu Yao, Jen-Wei Tsai, Chin-Chih Yeh, and Jou-Hung Wang, “A comparison of phase-noise in three ring-oscillator structures,” Proc. 12th VLSI Design CAD Symposium, Hsin-Chu, Aug. 2001.

[28] Chia-Yu Yao, “A study of SPT-term distribution of CSD numbers and its application for designing fixed-point linear phase FIR filters,” Proc. 2001 IEEE Int’l Symp. on Circuits and Systems, vol. II, Sydney, Australia, May 2001, pp.301-304. (EI)

[29] Chin-Chih Yeh and Chia-Yu Yao, “A heuristic algorithm for the design of linear phase FIR filters with signed-powers-of-two coefficients,” Proc. 2000 Nat’l Symp. on Telecommunications, vol. 1, Chung-Li, Taiwan, Dec. 2000, pp. 223-228.

[30] Chia-Yu Yao, “A CMOS 2.5V 1GHz frequency synthesizer design,” 1999 Fall Workshop on Information Theory & Communications, Sep. 1999.

[31] Chia-Yu Yao, et al., “Some measured bit error rate and burst errors of the fixed indoor wireless channels,” Proc. TANET’98, Hualein, Nov. 1998.

[32] Chia-Yu Yao, et al., “64Kbps wireless modem prototype design and channel measurement,” HP EESof User’s Group Meeting, Taipei, Aug. 1998.

[33] Daniel Lee, Chuan-Yi Tang, Jywe-Fei Fang, Chia-Yu Yao, and In-Jen Lin, “Parallel iterative methods – pipelined iterative methods on combustion problem,” Proc. 10th Int’l Conf. on Parallel CFD, May 1998.

[34] Chia-Yu Yao, “An adaptive antenna beamformer for wireless LAN,” 1998 IEEE Spring Workshop on Information Theory & Communications, Taipei, Feb. 1998.

[35] Chia-Yu Yao, et al., “A new DDFS design employing perceptron,” Proc. 7th VLSI Design CAD Symposium, Tao-Yuan, 1996.

[36] Chia-Yu Yao, “How to implement negative resistors in an electric analog neural network,” Proc. Int’l Conf. on Neural Information Processing, Seoul, 1994.

[37] Chia-Yu Yao, “A remote active phase estimation method for active noise control,” Proc. Int’l Symp. on Communications, pp.1325-1332, Hsin-Chu, 1993.

[38] Wei-Chung Peng, Chia-Yu Yao, Henley Woo, A. Caroglanian, and L. Piotrowski, “A multipath propagations study using CLASS,” Proc. MILCOM’92, 1992.

[39] Chia-Yu Yao and A. N. Willson, Jr., “One-neuron circuitry for carry generation in a 4-bit adder,” Proc. Int’l Joint Conf. on Neural Networks, Baltimore, June 1992.

[40] Chia-Yu Yao, Wei-Chung Peng, Dennis Lai, and Roger Avant, “An analysis on the STGT MA phase calibration,” Proc. Int’l Symp. on Communications, Tainan, Dec. 1991.

[41] Chia-Yu Yao and A. N. Willson, Jr., “A neural network approach to statistical decision making,” Proc. IEEE Int’l Symp. on Circuits and Systems, New Orleans, May 1990. (EI)

[42] Soochang Pei and Chia-Yu. Yao, “A personal-computer based speaker dependent speech recognition system,” Proc. of the National Control Conf., Taiwan, Nov. 1985.

專利.專書.技術報告

[1] Chia-Yu Yao, “The Design of Hybrid Symmetrical-FIR/Analog Pulse-Shaping Filters,” 國科會成果報告, NSC 98-2221-E-011-085.

[2] Chia-Yu Yao, “Synthesis of Integer-Coefficient digital Filters - Design Automation from System Specifications to Realization (II),” 國科會成果報告, NSC 97-2221-E-011-139.

[3] Chia-Yu Yao, “Synthesis of Integer-Coefficient digital Filters - Design Automation from System Specifications to Realization (I),” 國科會成果報告, NSC 96-2221-E-011-175.

[4] Chia-Yu Yao, “A Design Method of FIR Filters for QAM Applications” 國科會成果報告, NSC 95-2221-E-011-214.

[5] Chia-Yu Yao, “A fast design method of fixed-point coefficients for constant multiplications by dynamic programming,” 國科會成果報告, NSC 94-2215-E-011-007

[6] Wei-Chung Peng, Chia-Yu Yao, Henley Woo, and A. Caroglanian, “A Multipath Propagation Study Using CLASS,” Technical report of LinCom Corporation, 1991.

[7] Chia-Yu Yao, The Generalized Hopfield Network and its Application. Ph.D. dissertation of UCLA, 1992.

[8] Chia-Yu Yao, “A New DDFS Design Employing Perceptron,” 國科會成果報告, NSC83-0404-E-211-001, 1995.

[9] Chia-Yu Yao, “A New Active Noise Control Using Remote Sinusoidal Reduction Method,” 國科會成果報告, NSC84-2213-E-211-003, 1995.

[10] Chia-Yu Yao, “An Adaptive Antenna Beamformer for Wireless LAN: Algorithm and Realization”, 國科會成果報告, NSC86-2213-E-211-006, 1996.

[11] 姚嘉瑜, “VLSI 電路設計導論,” 87年度大學校院VLSI科技教育改進計畫, 1998.

[12] Chia-Yu Yao, “A VHDL Program Generator for Linear Phase FIR Filters with Signed-Powers-of- Two Coefficients,” 國科會成果報告, NSC90-2215-E-211-001, 2002.

[13] Chia-Yu Yao, “Development of 2.4 GHz Stereo Digital Wireless Speakers and Headphones,” 國科會成果報告, NSC91-2622- E-211-004-CC3, 2003.

[14] Chia-Yu Yao, “A VHDL Program Generator for FIR Filters with Signed-Powers-of-Two Coefficients in Communication Baseband Signal Processing,” 國科會成果報告, NSC 92-2218- E-211-002, 2004.