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陳伯奇

個人網站
電子工程系(所)
 
學經歷:
  學歷:
國立台灣大學電機博士
經歷:
2021.10 ~ 2022.01台灣優華語計畫執行辦公室 執行長
2021.08 ~ 2023.07印尼萬隆理工兼任教授
2018.08 ~ 2021.07應用科技學院院長
2018.01 ~ 2018.07台科大產學長
2014.08 ~ 2017.07台科大電子系主任
2013.04 ~ 2014.07台科大創新育成中心主任
2011.02 ~ 迄今 國立台灣科技大學 電子工程系 教授
2010.11 ~ 2017.03國立台灣科技大學系統晶片研發中心主任
2007.07 ~ 迄今 經濟部標準檢驗局 電子工程國家標準技術委員會 委員
2007.05 ~ 迄今 司法院 專利行政訴訟事件諮詢小組 委員
2006.03 ~ 迄今 經濟部 智慧財產局 專利代理人
2006.02 ~ 2011.02國立臺灣科技大學 電子工程系 副教授
2002.06 ~ 迄今 中華電信 中華電信研究所 電信設備驗證委員會委員
2001.08 ~ 2006.12經濟部 智慧財產局 專利審查委員
2001.08 ~ 2006.01國立台灣科技大學 電子工程系 助理教授
2001.02 ~ 迄今 消費者文教基金會 委員
1988.08 ~ 2001.07國立台灣科技大學 電子工程系 講師
 
專業技術
  類比IC設計與佈局、混合模式IC設計、驅動IC設計、專利鑑定
類比積體電路設計、類比積體電路設計實習、類比積體電路設計與佈局、類比積體電路專論、電子電路(一)(二)、電子電路實習(一)(二)、網路管理
   
研究成果與計畫
 

教授課程

類比積體電路設計、類比積體電路佈局、高等類比混合積體電路佈局與實習、平面顯示器IC設計、電子學(一)(二)、電子學實習(一)(二)

重要研究成果

榮譽獎項

  • 2021.11 印尼萬隆理工混模電路設計國際線上會議主講人
  • 2020.10 台灣林口 International Electron Devices & Materials Symposium 2020 (IEDMS 2020) 議程委員
  • 2020.10 印尼泗水 The 3rd International Conference on Vocational Education and Electrical Engineering (ICVEE) 2020 諮詢委員會委員
  • 2020.09 印尼日惹 The 6th International Conference on Science and Technology (ICST 2020) 邀請演講
  • 2020.06 波蘭華沙 27-th International Conference Mixed Design of Integrated Circuits and Systems 專題演講
  • 2019.11 印尼萬隆 The 4th Padjadjaran International Physics Symposium (PIPS) 2019 專題演講
  • 2019.10 印尼楠榜 International Conference on Science, Infrastructure Technology and Regional Development (ICoSITeR) 2019 特邀講者
  • 2019.09 中國宜昌 The 4rd International Conference on Intelligent Green Building and Smart Grid (IGBSG 2019) 國際會議專題講者
  • 2019.08 印尼萬隆 International Conference on Sustainable Engineering and Creative Computing (ICSECC 2019) 專題演講者
  • 2019.08 印尼峇里島 Broad Exposure to Science and Technology, BEST2019 專題演講者
  • 2019.07 日本大阪 International Congress on Advanced Materials Sciences and Engineering 2019 (AMSE-2019) 邀請講者
  • 2019.07 印尼萬隆理工電資學院夏令營客座教師
  • 2019.05 台灣台北 2019 Asian Engineering Deans Summit (AEDS) 邀請演講
  • 2019.05 波蘭波茲南 Seminar on Internationalization: Strategy and Mission 專題演講者
  • 2011 印尼巴里島QiR國際會議受邀演講
  • 2011  IEEE Midwest Symposium on Circuits and Systems 議程主席
  • 2011 2011 IEEE International Conference on Anti-counterfeiting, Security, and Identification 大會主題演講
  • 2011  VLSI/CAD 2011 議程委員
  • 2011  IEEE Transactions on Very Large Scale Integration Systems期刊副編輯
  • 2011 應邀至Seoul National University做專題演講
  • 2011 擔任IEEE SOC Conference (SOCC)國際會議之技術議程委員
  • 2011 應中國國際人才交流基金會邀請至北京講授『ADC/DAC Design』短期課程
  • 2010  VLSI/CAD 2010 議程委員
  • 2010  IEEE ISNE 2010 國際會議議程委員
  • 2010 印尼SITIA 2010國際會議之keynote speaker
  • 2010 自強基金會榮譽教師
  • 2010  CIC晶片製作佳作設計獎
  • 2010 印尼泗水理工大學研究生之guest lecturer
  • 2009  VLSI/CAD 2009 議程委員
  • 2009  IEEE PEDS 國際會議網路組召集人
  • 2009  CIC晶片製作佳作設計獎
  • 2008  VLSI/CAD 2008 議程委員
  • 2008 2008 AMDPE國際研討會議程委員與議程主席
  • 2008 2008年系統雛型與電路設計創新應用研討會議程委員
  • 2007  VLSI/CAD 2007 議程委員
  • 1999 行政院三等服務獎章
  • 1994 全校教學優良教師
  • 1993 全校教學優良教師

期刊論文

  • Poki Chen, Chun-Chi Chen, Jia-Chi Zheng and You-Sheng Shen, “A PVT Insensitive Vernier-Based Time-to-Digital Converter with Extended InputRange and High Accuracy,” IEEE Transaction on Nuclear Science, vol. 54, pp. 294-302, Apr 2007.
  • Poki Chen, Chun-Chi Chen and You-Sheng Shen, “A Low Cost Low Power CMOS Time-to-Digital Converter Based on Pulse Stretching,” IEEE Transaction on Nuclear Science, vol. 53, no. 4, pp. 2215-2220, Aug. 2006
  • Chun-Chi Chen, Poki Chen, An-Wei Liu, Wen-Fu Lu and Yu-Chi Chang “An Accurate CMOS Delay-Line-Based Smart Temperature Sensor for Low-Power Low-Cost Systems” Meas. Sci. Technol., Vol. 17, No. 4, pp.840-P.846, Apr 2006.
  • Poki Chen, Mao-Hsing Chiang, Yung-Hsing Jen and Chun-Chi Chen “The Perfect Layouts for Matching Multiple Cascode Current Sources under Parabolic Parameter Gradient,” WSEAS transactions on systems, Issue 1, Vol. 5, pp. 264-270, Jan 2006.
  • Chun-Chi Chen, Poki Chen, Chorng-Sii Hwang, Wei Chang , “A Precise Cyclic CMOS Time-to-Digital Converter with Low Thermal Sensitivity,” IEEE Transaction on Nuclear Science, Vol. 52, No. 4, pp.834-838, Aug. 2005.
  • Poki Chen, Chun-Chi Chen, Chin-Chung Tsai, and Wen-Fu Lu, “A Time-to-Digital-Converter-Based CMOS Smart Temperature Sensor,” IEEE Journal of Solid-State Circuits, Vol. 40, Issue 8, pp. 1642 – 1648, Aug. 2005.
  • Chorng-Sii Hwang, Poki Chen, and Hen-Wai Tsao, “A high-precision time-to-digital converter using a two-level conversion scheme”, IEEE Transaction on Nuclear Science, vol.51, Issue.4, pp.1349-1352, Aug. 2004.
  • Poki Chen, Shen-Iuan Liu, and Jingshown Wu, "A CMOS Pulse-Shrinking Delay Element For Time Interval Measurement, " IEEE CAS-II, Vol. 47, No. 9, pp. 954-8, Sep. 2000.
  • Poki Chen, Mon-Chau Shie, Zhi-Yuan Zheng, Zi-Fan Zheng and Chun-Yan Chu, “A Fully Digital Time Domain Smart Temperature Sensor Realized with 140 FPGA Logic Elements”, IEEE Transactions on Circuits and Systems I, Vol. 54, pp.2661-2668, Dec 2007.
  • Poki Chen and Ting-Chun Liu, “Switching Schemes for Reducing Capacitor Mismatch Sensitivity of Quasi-Passive Cyclic DAC,” IEEE Transactions on Circuits and Systems II, Vol. 56, pp. 26-30, Jan. 2009.
  • Poki Chen, Tuo-Kuang Chen, Yu-Shin Wang and Chun-Chi Chen, “A Time-Domain Sub-Micro Watt Temperature Sensor with Digital Set-Point Programming,” IEEE Sensors Journal, Vol. 9, pp. 1639-1646, Dec 2009.
  • Poki Chen, Chun-Chi Chen, Yu-Han Peng, Kai-Ming Wang and Yu-Shin Wang, “A Time-Domain SAR Smart Temperature Sensor with Curvature Compensation and a 3-sigma Inaccuracy of -0.4oC~+0.6oC over a 0oC to 90oC Range,” IEEE Journal of Solid-State Circuits, Vol. 45, pp. 600-609, Mar. 2010.
  • Poki Chen, Po-Yu Chen, Juan-Shan Lai and Yi-Jin Chen, “FPGA Vernier Digital-to-Time Converter with 1.58ps Resolution and 59.3 Minutes Operation Range,” IEEE Transactions on Circuits and Systems I, Vol. 57, pp.1134-1142, June 2010.
  • Poki Chen, Shou-Zhi Chen, You-Sheng Shen and You-Jyun Peng,“All-Digital Time-Domain Smart Temperature Sensor with an Inter-Batch Inaccuracy of -0.7oC~+0.6oC after One-Point Calibration,” IEEE Transactions on Circuits and Systems I, , Vol. 58, pp.913-920, May 2011.

會議論文

  • Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao, “A High-Resolution and Fast-Conversion Time-to-Digital Converter,” ISCAS 2003, Vol. 1, pp.37-40, May 2003.
  • Wei Chang , Mao-Hsing Chiang, and Poki Chen, “A Highly Accurate Cyclic CMOS Time to Digital Converter with Temperature Compensation”, The 14th VLSI Design/CAD Symposium, pp.573-576, Aug. 2003.
  • Wei Chang , Mao-Hsing Chiang, and Poki Chen, “A Highly Accurate Cyclic CMOS Time to Digital Converter with Temperature Compensation”, The 14th VLSI Design/CAD Symposium, pp.573-576, Aug. 2003.
  • Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao, "A High-Precision Time-To-Digital Converter Using A Two-Level Conversion Scheme", 2003 IEEE Nuclear Science Symposium, Vol.1, pp. 174-176, Oct. 2003.
  • Chorng-Sii Hwang, Poki Chen, and Hen-Wai Tsao, “A wide-range and fast-locking clock synthesizer IP based on delay-locked loop”, IEEE ISCAS 2004, Vol.1, pp. 785-788, May 2004.
  • Chun-Chi Chen, Wei Chang and Poki Chen, “A Precise Cyclic CMOS Time-to-Digital Converter with Low Thermal Sensitivity,” 2004 IEEE Nuclear Science Symposium, vol. 3, pp. 1364-1367, Oct. 2004.
  • Chun-Chi Chen, Wen-Fu Lu, Chin-Chung Tsai, Poki Chen, "A Time-to-Digital-Converter-Based CMOS Smart Temperature Sensor," ISCAS 2005, pp. 560-563, May 2005.
  • Poki Chen, Jia-Chi Zheng, Chun-Chi Chen, “A Monolithic Vernier-Based Time-to-Digital Converter with Dual PLLs for Self-Calibration,” IEEE CICC 2005, P-32, pp.321-324, Sep. 2005.
  • Chun-Chi Chen, An-Wei Liu , Yu-Chi Chang, and Poki Chen, “An Accurate CMOS Time-to-Digital-Converter-Based Smart Temperature Sensor with Negative Thermal Coefficient,” The 4th IEEE conference on sensors, pp.849-852, Oct. 2005.
  • Yung-Hsing Jen, Mao-Hsing Chiang, Chun-Chi Chen, and Poki Chen, “A perfect matching layout for multiple cascode current sources,” 2005 WSEAS Int. Conf. on DYNAMICAL SYSTEMS and CONTROL, pp.529-534, Nov. 2005
  • Poki Chen, Chun-Chi Chen, Tuo-Kuang Chen and Shi-Wei Chen, “A Time-Domain Mixed-Mode Temperature Sensor with Digital Set-Point Programming,” IEEE CICC 2006, pp.821-824, Sept 2006.
  • Chun-Chi Chen, Poki Chen and You-Sheng Shen, “A Low Power CMOS Time-to-Digital Converter Based on Duty Cycle Controllable Pulse Stretcher,” IEEE ESSCIRC 2006, pp.316-319, Sept. 2006.
  • Poki Chen, Mon-Chau Shie, Zi-Fan Zheng, Chun-Yan Chu and Yun-Yuan Shih, "A Fully Digital Low Cost Time Domain Smart Temperature Sensor with Extremely Tiny Size," IEEE A-SSCC, pp.147~153, Nov. 2006.
  • Poki Chen, Chun-Chi Chen, and Kai-Ming Wang, “A SAR-Based Smart Temperature Sensor with Binary-Weighted Search Algorithm,” 2007 VLSI/CAD Symposium, C3-3, Aug. 2007.
  • Poki Chen, Shi-Wei Chen and Juan-Shan Lai, “A LowPowerWideRange Duty Cycle Corrector Based on Pulse Shrinking/Stretching Mechanism,” IEEE A-SSCC 2007, 17-5, pp. 460-463, Nov. 2007.
  • Poki Chen, Chun-Chi Chen, Kai-Ming Wang, Yu-Han Peng, Yu-Shin Wang, “A Time-Domain SAR Smart Temperature Sensor with -0.25~+0.35oC Inaccuracy for On-Chip Monitoring,” IEEE ESSCIRC 2008, pp. 70-73, Sept. 2008.
  • Poki Chen, Juan-Shan Lai and Po-Yu Chen, “A FPGA Vernier Digital-to-Time Converter with 3.56ps Resolution and -0.23~+0.2LSB Inaccuracy,” IEEE CICC, pp.209-212, Sept. 2008.
  • Poki Chen, Tuo-Kuang Chen, Hsiao-Tzu Hu,Yu-Han Peng and Yi-Jin Chen, “A Digital Pulse Width Modulator Based on Pulse Shrinking Mechanism,” IEEE PEDS 2009, No. 433, Nov. 2009.
  • Poki Chen, Kai-Ming Wang, Chuan-Yuan Li, Po-Yu Chen, Juan-Shan Lai and Cheng-Wei Liu, “CMOS Time-to-Digital Converter with Low PVT Sensitivity 20.8ps Resolution and -0.25~0.22 LSB Inaccuracy,” IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID), to be published, Xiamen, China, June 2011. (Keynote Speech)
  • Poki Chen, Shou-Chih Chen, You-Sheng Shen and Li-Tse Lo, “Going from Analogue to Digital: FPGA-Realizable Temperature Sensor with One-Point Calibration Support,” The 12th International Conference on QiR (Quality in Research), to be published, Bali, Indonesia, July 2011. (Invited Paper)
  • Poki Chen, Shou-Zhi Chen, You-Sheng Shen and You-Jyun Peng,“All-Digital Time-Domain Smart Temperature Sensor with an Inter-Batch Inaccuracy of -0.7oC~+0.6oC after One-Point Calibration,” IEEE Transactions on Circuits and Systems I, , Vol. 58, pp.913-920, May 2011.
  • Poki Chen, Ya-Yun Hsiao, Yi-Su Chung, Wei Xiang Tsai and Jhih-Min Lin, “A 2.5-ps Bin Size and 6.7-ps Resolution FPGA Time-to-Digital Converter Based on Delay Wrapping and Averaging,” IEEE Transactions on Very Large Scale Integration Systems, Vol. 25, pp. 114-124, Jan 2017.
  • Yung-Jr Hung, Meng-Syuan Cai, Jia-Fa Chen, Hsiu-Wei Su, Po-Chang Jen, Poki Chen, Chih-Cheng Shih, and Ting-Chang Chang, "High-voltage backside-illuminated CMOS photovoltaic module for powering implantable temperature sensors," IEEE Journal of Photovoltaics, Vol. 8, pp. 342 - 347, Jan. 2018.
  • Tao-Chun Yu, Shao-Yun Fang, Chia-Ching Chen, Yulong Sun and Poki Chen, “Device Array Layout Synthesis with Nonlinear Gradient Compensation for a High-Accuracy Current-Steering DAC,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 37, pp. 717-728, Apr 2018.
  • Chih-Wen Lu, Pei-Yi Lai Lee, You-Gang Chang, Xing-Wei Huang, Jhih-Siou Cheng, Po-Yu Tseng, Chih-Hsien Chou, Poki Chen, Tsin-Yuan Chang and Jenny Yi-Chun Liu, "A 10-bit 1026-Channel Column Driver IC With Partially Segmented Piecewise Linear Digital-to-Analog Converters for UHD TFT-LCDs With One Billion Color Display," IEEE Journal of Solid-State Circuits, vol. 54, pp. 2703-2716, Oct. 2019.
  • Poki Chen, Jian-Ting Lan, Ruei-Ting Wang, Nguyen My Qui, John Carl Joel S. Marquez, Seiji Kajihara and Yousuke Miyake. "High-Precision PLL Delay Matrix With Overclocking and Double Data Rate for Accurate FPGA Time-to-Digital Converters," IEEE Transactions on Very Large Scale Integration Systems, Vol. 28, pp. 904 - 913, April 2020.
  • Nguyen My Qui, Chang Hong Lin, and Poki Chen. "Design and Implementation of a 256-Bit RISC-V-Based Dynamically Scheduled Very Long Instruction Word on FPGA," IEEE Access, vol. 8, pp. 172996-173007, Sept. 2020.
  • Poki Chen, Yung-Hsuan Chen, John Carl Joel S. Marquez, Ruei-Ting Wang, Jiann-Jong Chen and Yuh-Shyan Hwang. " Low Flicker Dimmable Multichannel LED Driver With Matrix-Style DPWM and Precise Current Matching," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 11, pp. 2233-2242, Nov. 2020.
  • Hsuan-Lun Kuo, Chih-Wen Lu and Poki Chen, ‘’An 18.39 fJ/Conversion-Step 1-MS/s 12-bit SAR ADC With Non-Binary Multiple-LSB-Redundant and Non-Integer-and-Split-Capacitor DAC,” IEEE Access, vol. 9, pp. 5651-5669, Jan. 2021.
  • Ping-Hung Yin, Chih-Wen Lu, Jia-Shyang Wang, Keng-Li Chang, Fu-Kuo Lin and Poki Chen, “A 368 × 184 Optical Under-Display Fingerprint Sensor Comprising Hybrid Arrays of Global and Rolling Shutter Pixels With Shared Pixel-Level ADCs,” IEEE Journal of Solid-State Circuits, vol. 56, no. 3, pp. 763-777, March 2021.
  • Yu Bang Chang, Chieh Tsai, Chang Hong Lin and Poki Chen, "Real-Time Semantic Segmentation with Dual Encoder and Self-Attention Mechanism for Autonomous Driving," Sensors, 21(23), 8072,Dec 2021.

專利

  • Poki Chen, Shen-Iuan Liu, Hern-Wei Tsao and Jingshown Wu, "SIGNAL PROCESSING APPARATUS," U.S. Patent, No: 6118390, 2000.9.12 - 2017.10.10
  • Poki Chen, Shen-Iuan Liu, and Jingshown Wu, “CMOS pulse shrinking delay element with deep subnanosecond resolution,” U.S. Patent, No: 6288587, 2001.9.11 - 2019.4.6
  • 陳伯奇、劉深淵、吳靜雄,"具深次奈秒解析度之互補型金氧半脈衝縮減延遲元件",中華民國專利,發明第一三零四一三號,自民國九十年四月十一日至一零七年十二月三十日止
  • 陳伯奇、陳俊吉、蔡志忠,“數位溫度感測系統”,中華民國專利,發明第I275782號,自自2007年03月11日至2026年01月12日止
  • 陳伯奇、鄭子凡,“全數位溫度感測電路及方法” ,中華民國專利,發明第I294029號,自2008年03月1日至2026年10月29日止
  • 陳伯奇、陳俊吉、陳拓光,“時域數位溫度感測系統及其方法”, 中華民國專利,發明第I355485號,自2012年1月1日至2027年12月3日止。

其他

  • 陳伯奇、陳拓光,“超低面積與功耗之內嵌式數位溫控器設計”,電子月刊,174-186頁,2007年9月
  • 陳伯奇、陳首志,“廉價且低功耗之全數位溫度感測器 ”,電子月刊,2008 年8 月
  • Bing Sheu, San-Liang Lee, Poki Chen, Peter Chung-Yu Wu, Liang-Gee Chen, Soe-Tsyr Yuan and Shuo-Yan Chou, Sharing Experiences from Forum on “Global Talents Competitiveness in Man / Machine Symbiotic World”, IEEE Circuits and Systems Society Newsletters, Volume 6, Number 3, June 2012.

研究計畫

  • 智慧型民生能源管理系統研究與開發(2/3)  99.10~100.09 國科會
  • 具數位自我校準之高精度時間至數位轉換器(II)  99.08 ~ 100.07 國科會
  • 台荷跨國積體電路研究與設計之學術交流合作計畫 99.03~99.12 國科會
  • 台美跨國積體電路研究與設計之學術交流合作計畫 98.3-98.12 教育部
  • 模組化高效率電能回收型燒機測試系統(2/3)  98.11~99.10 國科會
  • 智慧型民生能源管理系統研究與開發(1/3)  98.10~99.09 國科會
  • 具數位自我校準之高精度時間至數位轉換器(I)  98.08-99.07 國科會
  • 模組化高效率電能回收型燒機測試系統 (1/3)  97.11~98.10 國科會
  • 高精度與低製程、電壓、溫度變異敏感度之脈衝擴展式時間至數位轉換器及其應用(II)  97.08~98.07 國科會
  • 提升技職院校類比積體電路設計與教學之國際學術交流計畫 97.03~97.12 教育部
  • 高精度與低製程、電壓、溫度變異敏感度之脈衝擴展式時間至數位轉換器及其應用 96.8~97.7 國科會
  • 以雙鎖相迴路為核心之游標尺式高精度數位至時間轉換器 95.8~96.7 國科會
  • 高頻積體電路設計應用之國際產學實務研發合作與交流計畫 95.03~95.12 教育部
  • 動態灰階快速反應時間技術 95.01~95.12 教育部
  • 具雙鎖相迴路之游標尺式時間至數位轉換器 94.8~95.7 國科會
  • TFTLCD時序控制IC之研究與設計 94.8.4~94.12.31 教育部
  • 以延遲鎖定迴路為核心之游標尺式時間至數位轉換器 93.8~94.7 國科會
  • 超大型積體電路與系統設計教育改進計畫—課程推廣計畫 93.3~93.12 教育部
  • 廉價、高精度、以時間至數位轉換器為核心之智慧型溫度感測器 92.8~93.7 國科會
  • 超大型積體電路與系統設計教育改進計畫—課程推廣計畫子計畫「類比積體電路設計與佈局」92.3~92.12 教育部

  • 數位視訊廣播系統共同頭端有條件式接取擾碼平台之研製 92.12.1~93.11.30 國科會
  • 循環式時間至數位轉換器之溫敏特性研究與應用 91.8~92.7 國科會